Semiconductor power devices operate at high current densities, and as such, require current carrying conductors having low enough contact resistances to adequately handle the current to and from the device. There are limitations, however, for metal deposition thickness during fabrication of the semiconductor power device. This metal deposition thickness limitation necessitates having to deposit metal conductors on both the front and back sides of the semiconductor power device, e.g., power field effect transistor (power-FET). But having to use back side contact of the power element(s) of the device, e.g., drain requires extensive processing to eliminate the series resistance of the semiconductor substrate, thereby adding significant cost to the final semiconductor power product.